Area and Energy Efficient VLSI Architectures for Low-density Parity-check Decoders Using an On-the-fly Computation
Area and Energy Efficient VLSI Architectures for Low-density Parity-check Decoders Using an On-the-fly Computation PDF book is popular book written by Kiran Kumar Gunnam. The book was released by on 2010 with total hardcover pages . Fast download link is given in this page, you could read Area and Energy Efficient VLSI Architectures for Low-density Parity-check Decoders Using an On-the-fly Computation by Kiran Kumar Gunnam in PDF, epub and kindle directly from your devices.
Area and Energy Efficient VLSI Architectures for Low-density Parity-check Decoders Using an On-the-fly Computation
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Area and Energy Efficient VLSI Architectures for Low-density Parity-check Decoders Using an On-the-fly Computation Book Detail
- Author : Kiran Kumar Gunnam
- Release Date : 2010
- Publisher :
- Genre :
- Pages :
- ISBN 13 :
- File Size : 86,86 MB